- Research Interests
- Biomedical and Health Systems
- Embedded Systems and Real-time Embedded Systems
- VLSI Circuit Design
- Near Filed-Sensing, Emerging Technologies (NEMS switches and Nanotechnology)
- Current Projects
- Wearable Real-Time Heart Attack and Epileptic Seizure Detection and Warning System to Reduce Car Accidents in Qatar, UREP’s Project, Qatar University, Qatar
- Wearable Sign Language Interpretable System (WSLIS, Qatar University, Qatar
- Portable Automated Intelligent System for Continuous Oxygen Monitoring and Adjustment Oxygen Delivery for Hypoxic Patients, University of Waterloo, Canada
- Some of my Previous Projects
- Portable Automated Intelligent System for Continuous Oxygen Monitoring and Adjustment Oxygen Delivery for Hypoxic Patients, University of Waterloo, Canada\
- Near-Field Ground Penetrating Radar System (GPRs) for Millimetres Crack Detection in Waterproofed Concrete Bridge Decks, University of Waterloo, Canada
- NEMS Processor and Micro-Controller ,CWRU,DARPA Project, Cleveland, Ohio,USA
- Embedded Sync Server using SNTP Protocol and GPS, Yarmouk University, Jordan
- Programmable Logic Controller (PLC):Designed and built a PLC simulator using VC++ and SQL server Designed and implemented,Yarmouk University, Jordan
- Multi-Agents system using VC++ and socket programming,Yarmouk University, Jordan
- Some of Supervised Students’ Projects
- Supervised and monitored more than 25 students in their senior graduation projects (undergraduate level).Tafila Technical University, Jordan. Some of the students’ graduation projects:Automatic irrigation system,Wireless sensor for weather monitoring system
- Supervised more than 30 students in their senior graduation projects. Yarmouk University, Jordan. Some of the students’ graduation projects(CPE 598A):Web-based student election system,Image processing algorithm for edge detection and image enhancement,Computer based Radio System,Hardware encryption system,Online Doctor System,Implementing a 16-bit Microprocessor using hardware description language(Verilog)